[futurebasic] Re: [FB] FB^3 Threading Puzzle

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From: "Dr. Stratford" <sstratford@...>
Date: Tue, 28 Sep 1999 14:06:14 -0500
>The need for a UPP arises because (a) the Thread Manager may be either
>native or 68K, depending on the MacOS version (when I last looked it was
>still 68K), and (b) the Thread Manager does not know whether your program
>is native or 68K. The job of the UPP is to allow calls in any of the 4
>"directions" to work automatically (68K->PPC and vice versa, 68K->68K,
>PPC->PPC). The MixedMode manager does this by inspecting the UPP data and
>doing a mode switch only if required.

Two things:

(1) The latest Thread Manager documentation says this about 
YieldToAnyThread: "Threads must yield in the CPU addressing mode in 
which the application was launched (24- or 32-bit)."

(2) And this about NewThread: "Do not pass a routine descriptor as 
the Threadentry parameter to the NewThread function. ...You must pass 
the address of the routine, not the address of a routine descriptor. 
...The threads in your application must all be in the same 
instruction set, 680x0 or PPC, therefore the  routine identified by 
the ThreadEntry parameter is by definition in the same instruction 
set as the NewThread function and a routine descriptor is not 
required."

Does that bear on our discussion? Seems like the threadmanager is not 
expecting mixedmodemagic.

My threading test code compiled with cpu68k works fine passing in 
LINE "ThreadEntry".

The disassembly when compiled cpu68K is:
   THPROC
      +00000 0472D022   LINK       A3,#$FFF0
      +00004 0472D026   MOVEM.L    D3-D7/A2/A4/A6,-(A7)
      +00008 0472D02A   LEA        $0020(A7),A6
      +0000C 0472D02E   MOVEA.L    DATE2SECS+00014,A4
      +00012 0472D034   MOVE.L     $0008(A3),D0
      +00016 0472D038   MOVE.L     D0,-(A7)
      +00018 0472D03A   BSR        THHNDLR+0002A
      +0001C 0472D03E   MOVEM.L    (A7)+,D3-D7/A2/A4/A6
      +00020 0472D042   UNLK       A3
      +00022 0472D044   RTD        #$0004
   'FCOD 03E8 36B8 FB^3.68k'
      +16F62 0472D052   JSR        _FBEND+0D67C

which looks to me like straight code, no mixedmodemagic.


 

--Steve

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Steven J. Stratford, InterNetyx.com
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